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Silicon Labs /EFR32FG23B010F512IM48 /GPIO_NS /EUSART2_SCLKROUTE

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Interpret as EUSART2_SCLKROUTE

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0PORT 0PIN

Description

SCLK port/pin select

Fields

PORT

SCLK port select register
PIN

SCLK pin select register

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data